Physical Implementation Engineer

As a Physical Implementation Engineer, you will develop Secure-IC’s IP cores portfolio by ensuring the various phases of specifications, design, testing, integration.

Your role and responsibilities:

You will be in charge of the design of the IPs by improving the physical implementation flow (RTL to GDSII). You will notably perform the following missions :

  • Logic synthesis of the IPs developed by the digital design team
  • Floor-planning, Power-planning, Placement, Clock Tree Synthesis, Routing
  • Timing constraints definition
  • Static Timing Analysis (STA)
  • Post-layout verification (DRC, LVS)
  • Develop and improve the design flow
  • Scripting for flow automation (Tcl, Python, Bash, Makefile)

You will also participate in the design and development of our dedicated IPs offering for cybersecurity.

Education, Experience & Skills:

  • Master degree/Engineer Diploma in Microelectronics
  • Professional experience of ideally 4/5 years
  • Good knowledge and previous experience in ASIC design
  • First exposure to the physical implementation flow (synthesis, place and route)
  • Knowledge of ASIC-oriented design tools (Genus, Innovus, Design Compiler, ICC)
  • Experience in developing scripts (Python, Tcl, Bash) for automation purpose
  • Prior experience in Sign-off check (DRC, LVS) is an advantage
  • English language proficiency
  • Knowledge of a source code control system is a plus (especially GIT)
  • Experience (or even knowledge) in DFT is a plus
  • Good knowledge of VHDL is a plus


To apply, please send only PDF. Word document will not be opened.
  • Accepted file types: pdf.