FPGA/ASIC Design Engineer

Secure-IC develops security solutions for electronic embedded systems and connected objects. We protect electronic embedded systems against attacks and guarantee an optimal security level at each stage of the design process.

We are designing and implementing IP cores and subsystems that are carried out into FPGAs and ASICs.

Key Responsibilities

We are looking for a skilled ASIC Design engineer to reinforce our team.

As ASIC Design Engineer, you will participate in the development of Secure-IC’s IP cores portfolio :

  • by securing the different phases of specifications,
  • design,
  • test,
  • integration
  • and validation on FPGA.

Headquarters and R&D labs are based in France, in both Paris and Rennes.

Education, Experience & Skills Required

  • Engineer in micro-electronics
  • Knowledge and experience in FPGA/ASIC design
  • Good knowledge of VHDL
  • Experience in Back-End (synthesis, placement and layout), would be appreciated
  • Good understanding of back-end chain tools is a plus:
    • DCcompiler (Synopsys),
    • RTL compiler (Cadence),
    • Primetime (Synopsys),
    • Encounter/Virtuoso (Cadence),
    • Formality (Synopsys)
    • and Calibre (Mentor).
  • Proficient/fluent in English
To apply, please send only PDF. Word document won’t be opened.

 

  • Accepted file types: pdf.