Virtualyzr is an electronic design automation (EDA) software tool dedicated to pre-silicon security evaluation. The tool is easy to integrate within the design conception flow and allows a security check point at all design levels, namely RTL, Post Synthesis, Place-and-Route and Layout. Moreover, the analysis is end-to-end: from the design source, IP or SoC, to the full security report generation. Security vulnerabilities are extracted from any cryptographic, non-cryptographic or functional (bus, memories) implementation.
Two types of analysis are possible :
Pre-silicon evaluation is key tool to reduce time-to-market and post tape-out maintenance. By finely emulating the behavior of a device from its design, it is now possible to anticipate the security weaknesses before they become problems. As simulations consider the best attacker mode as the evaluation is conducted in perfect conditions by contrast to a real analysis usually impacted by the noise or measurement misalignment.
The high-level description of the internal process consists in three steps, detailed below.
The design is simulated according to its level conception (RTL / Post Synthesis / Place & Route). Simulated traces are obtained. Virtualyzr allows the user to select and probe the nodes to be tested.
The simulated traces are investigated and processed based on a mathematical consumption model to generate the so-called leakage traces. These traces are an image of the security leakage that can be exploited by an attacker to retrieve a sensitive information like a secret key.
An advanced physical analysis is performed on obtained leakage traces. Two types of analysis can be performed: black-box or white-box analysis.