CryptoIC 2025
Secure-IC is proud to announce its participation in the upcoming Cryptographic Chip Academic Conference (CryptoIC 2025), organized by the China Cryptography Society. The event will take place from August 15 to 17, 2025, at the Shaanxi Century Jin Yuan Grand Hotel in Xi’an, China — bringing together leading experts in cryptographic chip design and hardware security.
A Key Academic Gathering in China
CryptoIC is a major annual conference dedicated to the latest research and technological advancements in cryptographic hardware. It serves as a unique platform for academia and industry to share insights, present findings, and foster innovation in secure chip design.
The main sessions will be held on August 16 and 17 in the Grand Ballroom of the conference venue.
Keynote by Sylvain Guilley, CTO and Co-Founder of Secure-IC:
A highlight of the conference will be the presentation by Sylvain Guilley, Chief Technology Officer and Co-Founder of Secure-IC. He will speak on August 17, from 9:15 AM to 9:50 AM, on the topic:
“Code-Based Masking against Glitches by Hybridization with Threshold Implementation.”
Code-Based Masking (CBM) has been introduced to enhance high-order Boolean masking by increasing its resistance order via further decorrelating the coordinates of each symbol involved in the computation. Additionally, CBM enables cost amortization and fault detection. Notably, as demonstrated at CHES 2024, CBM facilitates the computation of provably masked operations under the Strong Non-Interference (SNI) security assumption with quasi-linear complexity. On the other hand, Threshold Implementation (TI) serves as an extension of Boolean masking, armoring it against combinational hazards. In this keynote speech, we show that merits of CBM and TI can be combined, paving the way to more secure hardware (high-order) masked implementations. We demonstrate CBM-TI, which is proven secure as well under SNI assumption and security when glitches worsen the leakage model. The security of CBM-TI is studied in a n-share setting, where n = 3 (minimal random splitting order required for TI). We analyzed CBM-TI in simulation and in real hardware (FPGA) to validate its security property. Leveraging high-order T-test leakage detection tool, we show that CBM-TI is endowed with higher-order security. Namely, TI leaks at order d = 3, whereas CBM-TI does not. We study several CBM-TI variants and show that the smallest leaking order of CBM-TI can be tuned to be as high as 7. This represents a significant progress over TI as each marginally improved order translates into exponentially more traces to attack the implementation.
Meet Us in Xi’an
Secure-IC is honored to be part of CryptoIC 2025 and looks forward to engaging with the Chinese academic and industrial community. Join us to discover our latest innovations and exchange ideas on the future of embedded cybersecurity.