Hardware Design Manager

Permanent contract (CDI), based in Rennes.

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Your role and responsibilities

Working in the Secure Silicon Engineering department, you will manage a team of engineers specialized in electronics and digital design, in charge of developing, customizing and delivering IPs from the portfolio targeting FPGAs and ASICs technologies.

Your responsibilities will include

• Team management activities
  – Supervise a team of engineers in charge of IP customization, ensuring that objectives are met and fostering professional development.
  – Plan and coordinate tasks to ensure efficient project execution
  – Ensure continuity of tasks and anticipate peak workloads
  – Recruit new talent 
• Internal collaboration
  – Collaborate with other managers in the department, fostering a team spirit, sharing resources and offering mutual support.
  – Work with the Architectures & Roadmaps team in capturing customer requirements, including participating in the review of specifications and workloads.
  – Work closely with the Project Management team to plan projects, ensure delivery milestones are met and monitor allocations.
• Technical support
  – Participate actively in the following activities when required:
  – Writing and reviewing specifications
  – RTL design development (VHDL/Verilog)
  – Simulation verification (RTL and pot-synthesis)
  – ASIC / FPGA synthesis
  – Checking equivalence
  – FPGA prototyping, SW team support
  – Deliveries and customer support
  – IP maintenance and enhancement
  – Pre-sales technical support
• Other activities
  – Quality reviews
  – Contribution to IPs product roadmap
  – Participation in the definition/improvement of internal processes
  – Team support and training

Education, Experience & Skills

• Fluent English required (customer meetings)
• You have solid skills in the design flow of RTL IP (VHDL, Verilog) for FPGA or ASIC targets.
• You have over 5 years’ experience as a digital electronics design engineer
• You have significant experience in team management, technical project management and leadership.
• You have a good knowledge of the ASIC manufacturing process
• You are familiar with hardware description languages such as VHDL and/or Verilog.
• You are able to deduce the logic to be synthesized on the circuit from existing code.
• You have significant experience in RTL verification (directed or randomized tests, VDHL testbench or System Verilog).
• You have experience in FPGA or ASIC synthesis (static timing analysis, writing timing constraint files).
• Scripts coding skills in a Linux environment (Makefile, python, shell, tcl…etc)
• Experience in security/cryptography is highly recommended
• Knowledge of UVM verification methodology is a plus
• Embedded software skills a plus
• You are rigorous, organized, open-minded, proactive and a leader. You are also a good communicator.

Covering letter is required.

Secure-IC is committed to equal opportunity and diversity. Our positions are therefore open to people with disabilities. Only skills and motivation make a difference.